The present invention relates to a semiconductor integrated circuit device and a method of manufacturing the same. More particularly, it relates to a semiconductor integrated circuit device having an MISFET (Metal Insulator Semiconductor Field Effect Transistor) having a high breakdown voltage and that having a low breakdown voltage on the same semiconductor substrate, and a method of manufacturing the same.
The MISFET having a high breakdown voltage is used for a driver of a liquid crystal display, a motor control driver for controlling a high electric current or a non-volatile memory which requires high voltage for programming.
This MISFET having a high breakdown voltage is designed to increase the breakdown voltage in various ways, for example, by thickening a gate insulating film.
In Japanese Patent Application Laid-Open No. Hei 11 (1999)-177047, described is a technique of forming the gate insulating film 10 of one of a plurality of electric field effect transistors different in thickness of a gate insulating film with a laminate of a thermal oxide film 8 and a deposited film 9.
In Japanese Patent Application Laid-Open No. 2000-68385 (corresponding to U.S. patent Ser. No. 09/208,019), described is a technique of simultaneously forming a electric field relaxing region NW (FD) of a high breakdown voltage NMOS transistor and a channel stopper NW (CS) in a well region NW of a low breakdown voltage PMOS transistor and in a well HNW region of a high breakdown voltage PMOS transistor.